;buildInfoPackage: chisel3, version: 3.1-SNAPSHOT, scalaVersion: 2.11.11, sbtVersion: 0.13.15, builtAtString: 2017-06-08 17:59:39.314, builtAtMillis: 1496944779314
circuit AdderExerciser : 
  module Adder : 
    input clock : Clock
    input reset : UInt<1>
    output io : {flip in0 : UInt<32>, flip in1 : UInt<32>, out : UInt<32>}
    
    clock is invalid
    reset is invalid
    io is invalid
    node _T_5 = add(io.in0, io.in1) @[Adder.scala 17:20]
    node _T_6 = tail(_T_5, 1) @[Adder.scala 17:20]
    io.out <= _T_6 @[Adder.scala 17:10]
    
  module AdderExerciser : 
    input clock : Clock
    input reset : UInt<1>
    output io : {}
    
    clock is invalid
    reset is invalid
    io is invalid
    reg ticker : UInt<32>, clock with : (reset => (reset, UInt<32>("h00"))) @[Exerciser.scala 20:36]
    reg max_ticks_for_state : UInt<32>, clock with : (reset => (reset, UInt<32>("h00"))) @[Exerciser.scala 21:36]
    reg state_number : UInt<32>, clock with : (reset => (reset, UInt<32>("h00"))) @[Exerciser.scala 22:36]
    reg state_locked : UInt<1>, clock with : (reset => (reset, UInt<1>("h01"))) @[Exerciser.scala 23:36]
    node _T_11 = add(ticker, UInt<1>("h01")) @[Exerciser.scala 27:20]
    node _T_12 = tail(_T_11, 1) @[Exerciser.scala 27:20]
    ticker <= _T_12 @[Exerciser.scala 27:10]
    node _T_14 = eq(state_locked, UInt<1>("h00")) @[Exerciser.scala 28:8]
    when _T_14 : @[Exerciser.scala 28:23]
      ticker <= UInt<1>("h00") @[Exerciser.scala 29:18]
      node _T_17 = add(state_number, UInt<1>("h01")) @[Exerciser.scala 30:34]
      node _T_18 = tail(_T_17, 1) @[Exerciser.scala 30:34]
      state_number <= _T_18 @[Exerciser.scala 30:18]
      skip @[Exerciser.scala 28:23]
    node _T_19 = gt(ticker, max_ticks_for_state) @[Exerciser.scala 32:20]
    node _T_21 = eq(_T_14, UInt<1>("h00")) @[Exerciser.scala 28:23]
    node _T_22 = and(_T_21, _T_19) @[Exerciser.scala 32:43]
    when _T_22 : @[Exerciser.scala 32:43]
      node _T_24 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 33:11]
      when _T_24 : @[Exerciser.scala 33:11]
        printf(clock, UInt<1>(1), "current state %d has run too many cycles, ticks %d max %d", state_number, ticker, max_ticks_for_state) @[Exerciser.scala 33:11]
        skip @[Exerciser.scala 33:11]
      state_locked <= UInt<1>("h00") @[Exerciser.scala 35:18]
      node _T_27 = add(state_number, UInt<1>("h01")) @[Exerciser.scala 36:34]
      node _T_28 = tail(_T_27, 1) @[Exerciser.scala 36:34]
      state_number <= _T_28 @[Exerciser.scala 36:18]
      skip @[Exerciser.scala 32:43]
    node _T_30 = gt(ticker, UInt<7>("h064")) @[Exerciser.scala 38:15]
    when _T_30 : @[Exerciser.scala 38:38]
      node _T_32 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 39:11]
      when _T_32 : @[Exerciser.scala 39:11]
        printf(clock, UInt<1>(1), "Too many cycles ticker %d current_state %d state_locked %x", ticker, state_number, state_locked) @[Exerciser.scala 39:11]
        skip @[Exerciser.scala 39:11]
      node _T_34 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 41:9]
      when _T_34 : @[Exerciser.scala 41:9]
        stop(clock, UInt<1>(1), 0) @[Exerciser.scala 41:9]
        skip @[Exerciser.scala 41:9]
      skip @[Exerciser.scala 38:38]
    inst c of Adder @[Adder.scala 40:33]
    c.io is invalid
    c.clock <= clock
    c.reset <= reset
    node _T_36 = eq(reset, UInt<1>("h00")) @[Adder.scala 43:9]
    when _T_36 : @[Adder.scala 43:9]
      printf(clock, UInt<1>(1), "state_number %d, ticker %d, state_locked %x max_ticks %d", state_number, ticker, state_locked, max_ticks_for_state) @[Adder.scala 43:9]
      skip @[Adder.scala 43:9]
    wire in0_vec : UInt<5>[20] @[Adder.scala 50:20]
    in0_vec is invalid @[Adder.scala 50:20]
    in0_vec[0] <= UInt<2>("h03") @[Adder.scala 50:20]
    in0_vec[1] <= UInt<3>("h04") @[Adder.scala 50:20]
    in0_vec[2] <= UInt<3>("h05") @[Adder.scala 50:20]
    in0_vec[3] <= UInt<3>("h06") @[Adder.scala 50:20]
    in0_vec[4] <= UInt<3>("h07") @[Adder.scala 50:20]
    in0_vec[5] <= UInt<4>("h08") @[Adder.scala 50:20]
    in0_vec[6] <= UInt<4>("h09") @[Adder.scala 50:20]
    in0_vec[7] <= UInt<4>("h0a") @[Adder.scala 50:20]
    in0_vec[8] <= UInt<4>("h0b") @[Adder.scala 50:20]
    in0_vec[9] <= UInt<4>("h0c") @[Adder.scala 50:20]
    in0_vec[10] <= UInt<4>("h0d") @[Adder.scala 50:20]
    in0_vec[11] <= UInt<4>("h0e") @[Adder.scala 50:20]
    in0_vec[12] <= UInt<4>("h0f") @[Adder.scala 50:20]
    in0_vec[13] <= UInt<5>("h010") @[Adder.scala 50:20]
    in0_vec[14] <= UInt<5>("h011") @[Adder.scala 50:20]
    in0_vec[15] <= UInt<5>("h012") @[Adder.scala 50:20]
    in0_vec[16] <= UInt<5>("h013") @[Adder.scala 50:20]
    in0_vec[17] <= UInt<5>("h014") @[Adder.scala 50:20]
    in0_vec[18] <= UInt<5>("h015") @[Adder.scala 50:20]
    in0_vec[19] <= UInt<5>("h016") @[Adder.scala 50:20]
    wire in1_vec : UInt<5>[20] @[Adder.scala 51:20]
    in1_vec is invalid @[Adder.scala 51:20]
    in1_vec[0] <= UInt<3>("h07") @[Adder.scala 51:20]
    in1_vec[1] <= UInt<4>("h08") @[Adder.scala 51:20]
    in1_vec[2] <= UInt<4>("h09") @[Adder.scala 51:20]
    in1_vec[3] <= UInt<4>("h0a") @[Adder.scala 51:20]
    in1_vec[4] <= UInt<4>("h0b") @[Adder.scala 51:20]
    in1_vec[5] <= UInt<4>("h0c") @[Adder.scala 51:20]
    in1_vec[6] <= UInt<4>("h0d") @[Adder.scala 51:20]
    in1_vec[7] <= UInt<4>("h0e") @[Adder.scala 51:20]
    in1_vec[8] <= UInt<4>("h0f") @[Adder.scala 51:20]
    in1_vec[9] <= UInt<5>("h010") @[Adder.scala 51:20]
    in1_vec[10] <= UInt<5>("h011") @[Adder.scala 51:20]
    in1_vec[11] <= UInt<5>("h012") @[Adder.scala 51:20]
    in1_vec[12] <= UInt<5>("h013") @[Adder.scala 51:20]
    in1_vec[13] <= UInt<5>("h014") @[Adder.scala 51:20]
    in1_vec[14] <= UInt<5>("h015") @[Adder.scala 51:20]
    in1_vec[15] <= UInt<5>("h016") @[Adder.scala 51:20]
    in1_vec[16] <= UInt<5>("h017") @[Adder.scala 51:20]
    in1_vec[17] <= UInt<5>("h018") @[Adder.scala 51:20]
    in1_vec[18] <= UInt<5>("h019") @[Adder.scala 51:20]
    in1_vec[19] <= UInt<5>("h01a") @[Adder.scala 51:20]
    node _T_125 = add(in0_vec[0], in1_vec[0]) @[Adder.scala 53:73]
    node _T_126 = tail(_T_125, 1) @[Adder.scala 53:73]
    node _T_127 = add(in0_vec[1], in1_vec[1]) @[Adder.scala 53:73]
    node _T_128 = tail(_T_127, 1) @[Adder.scala 53:73]
    node _T_129 = add(in0_vec[2], in1_vec[2]) @[Adder.scala 53:73]
    node _T_130 = tail(_T_129, 1) @[Adder.scala 53:73]
    node _T_131 = add(in0_vec[3], in1_vec[3]) @[Adder.scala 53:73]
    node _T_132 = tail(_T_131, 1) @[Adder.scala 53:73]
    node _T_133 = add(in0_vec[4], in1_vec[4]) @[Adder.scala 53:73]
    node _T_134 = tail(_T_133, 1) @[Adder.scala 53:73]
    node _T_135 = add(in0_vec[5], in1_vec[5]) @[Adder.scala 53:73]
    node _T_136 = tail(_T_135, 1) @[Adder.scala 53:73]
    node _T_137 = add(in0_vec[6], in1_vec[6]) @[Adder.scala 53:73]
    node _T_138 = tail(_T_137, 1) @[Adder.scala 53:73]
    node _T_139 = add(in0_vec[7], in1_vec[7]) @[Adder.scala 53:73]
    node _T_140 = tail(_T_139, 1) @[Adder.scala 53:73]
    node _T_141 = add(in0_vec[8], in1_vec[8]) @[Adder.scala 53:73]
    node _T_142 = tail(_T_141, 1) @[Adder.scala 53:73]
    node _T_143 = add(in0_vec[9], in1_vec[9]) @[Adder.scala 53:73]
    node _T_144 = tail(_T_143, 1) @[Adder.scala 53:73]
    node _T_145 = add(in0_vec[10], in1_vec[10]) @[Adder.scala 53:73]
    node _T_146 = tail(_T_145, 1) @[Adder.scala 53:73]
    node _T_147 = add(in0_vec[11], in1_vec[11]) @[Adder.scala 53:73]
    node _T_148 = tail(_T_147, 1) @[Adder.scala 53:73]
    node _T_149 = add(in0_vec[12], in1_vec[12]) @[Adder.scala 53:73]
    node _T_150 = tail(_T_149, 1) @[Adder.scala 53:73]
    node _T_151 = add(in0_vec[13], in1_vec[13]) @[Adder.scala 53:73]
    node _T_152 = tail(_T_151, 1) @[Adder.scala 53:73]
    node _T_153 = add(in0_vec[14], in1_vec[14]) @[Adder.scala 53:73]
    node _T_154 = tail(_T_153, 1) @[Adder.scala 53:73]
    node _T_155 = add(in0_vec[15], in1_vec[15]) @[Adder.scala 53:73]
    node _T_156 = tail(_T_155, 1) @[Adder.scala 53:73]
    node _T_157 = add(in0_vec[16], in1_vec[16]) @[Adder.scala 53:73]
    node _T_158 = tail(_T_157, 1) @[Adder.scala 53:73]
    node _T_159 = add(in0_vec[17], in1_vec[17]) @[Adder.scala 53:73]
    node _T_160 = tail(_T_159, 1) @[Adder.scala 53:73]
    node _T_161 = add(in0_vec[18], in1_vec[18]) @[Adder.scala 53:73]
    node _T_162 = tail(_T_161, 1) @[Adder.scala 53:73]
    node _T_163 = add(in0_vec[19], in1_vec[19]) @[Adder.scala 53:73]
    node _T_164 = tail(_T_163, 1) @[Adder.scala 53:73]
    wire expected_out_vec : UInt<5>[20] @[Adder.scala 53:29]
    expected_out_vec is invalid @[Adder.scala 53:29]
    expected_out_vec[0] <= _T_126 @[Adder.scala 53:29]
    expected_out_vec[1] <= _T_128 @[Adder.scala 53:29]
    expected_out_vec[2] <= _T_130 @[Adder.scala 53:29]
    expected_out_vec[3] <= _T_132 @[Adder.scala 53:29]
    expected_out_vec[4] <= _T_134 @[Adder.scala 53:29]
    expected_out_vec[5] <= _T_136 @[Adder.scala 53:29]
    expected_out_vec[6] <= _T_138 @[Adder.scala 53:29]
    expected_out_vec[7] <= _T_140 @[Adder.scala 53:29]
    expected_out_vec[8] <= _T_142 @[Adder.scala 53:29]
    expected_out_vec[9] <= _T_144 @[Adder.scala 53:29]
    expected_out_vec[10] <= _T_146 @[Adder.scala 53:29]
    expected_out_vec[11] <= _T_148 @[Adder.scala 53:29]
    expected_out_vec[12] <= _T_150 @[Adder.scala 53:29]
    expected_out_vec[13] <= _T_152 @[Adder.scala 53:29]
    expected_out_vec[14] <= _T_154 @[Adder.scala 53:29]
    expected_out_vec[15] <= _T_156 @[Adder.scala 53:29]
    expected_out_vec[16] <= _T_158 @[Adder.scala 53:29]
    expected_out_vec[17] <= _T_160 @[Adder.scala 53:29]
    expected_out_vec[18] <= _T_162 @[Adder.scala 53:29]
    expected_out_vec[19] <= _T_164 @[Adder.scala 53:29]
    reg test_number : UInt<32>, clock with : (reset => (reset, UInt<32>("h00"))) @[Adder.scala 54:33]
    node _T_192 = gt(test_number, UInt<5>("h014")) @[Adder.scala 56:55]
    node _T_194 = eq(state_number, UInt<6>("h021")) @[Exerciser.scala 53:23]
    when _T_194 : @[Exerciser.scala 53:52]
      node _T_196 = eq(state_locked, UInt<1>("h00")) @[Exerciser.scala 54:12]
      when _T_196 : @[Exerciser.scala 54:28]
        node _T_198 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 55:15]
        when _T_198 : @[Exerciser.scala 55:15]
          printf(clock, UInt<1>(1), "Entering state check adder state_number %d ticker %d", state_number, ticker) @[Exerciser.scala 55:15]
          skip @[Exerciser.scala 55:15]
        state_locked <= UInt<1>("h01") @[Exerciser.scala 56:29]
        ticker <= UInt<1>("h00") @[Exerciser.scala 57:29]
        max_ticks_for_state <= UInt<7>("h064") @[Exerciser.scala 58:29]
        state_number <= UInt<6>("h021") @[Exerciser.scala 59:22]
        skip @[Exerciser.scala 54:28]
      node _T_204 = bits(test_number, 4, 0)
      node _T_206 = bits(test_number, 4, 0)
      node _T_208 = bits(test_number, 4, 0)
      node _T_210 = bits(test_number, 4, 0)
      node _T_211 = add(in0_vec[_T_208], in1_vec[_T_210]) @[Adder.scala 61:28]
      node _T_212 = tail(_T_211, 1) @[Adder.scala 61:28]
      node _T_214 = bits(test_number, 4, 0)
      node _T_216 = eq(reset, UInt<1>("h00")) @[Adder.scala 57:11]
      when _T_216 : @[Adder.scala 57:11]
        printf(clock, UInt<1>(1), "%d ticker %d test# %d : %d + %d => %d expected %d\n", state_number, ticker, test_number, in0_vec[_T_204], in1_vec[_T_206], _T_212, expected_out_vec[_T_214]) @[Adder.scala 57:11]
        skip @[Adder.scala 57:11]
      node _T_218 = bits(test_number, 4, 0)
      node _T_220 = bits(test_number, 4, 0)
      node _T_222 = bits(test_number, 4, 0)
      node _T_223 = add(in0_vec[_T_220], in1_vec[_T_222]) @[Adder.scala 64:67]
      node _T_224 = tail(_T_223, 1) @[Adder.scala 64:67]
      node _T_225 = eq(expected_out_vec[_T_218], _T_224) @[Adder.scala 64:42]
      node _T_226 = or(_T_225, reset) @[Adder.scala 64:11]
      node _T_228 = eq(_T_226, UInt<1>("h00")) @[Adder.scala 64:11]
      when _T_228 : @[Adder.scala 64:11]
        printf(clock, UInt<1>(1), "Assertion failed\n    at Adder.scala:64 assert(expected_out_vec(test_number) === in0_vec(test_number) + in1_vec(test_number))\n") @[Adder.scala 64:11]
        stop(clock, UInt<1>(1), 1) @[Adder.scala 64:11]
        skip @[Adder.scala 64:11]
      node _T_230 = add(test_number, UInt<1>("h01")) @[Adder.scala 65:32]
      node _T_231 = tail(_T_230, 1) @[Adder.scala 65:32]
      test_number <= _T_231 @[Adder.scala 65:17]
      when _T_192 : @[Exerciser.scala 63:38]
        node _T_233 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 64:15]
        when _T_233 : @[Exerciser.scala 64:15]
          printf(clock, UInt<1>(1), "Leaving state  check adder state_number %d ticker %d", state_number, ticker) @[Exerciser.scala 64:15]
          skip @[Exerciser.scala 64:15]
        state_locked <= UInt<1>("h00") @[Exerciser.scala 65:22]
        node _T_236 = add(state_number, UInt<1>("h01")) @[Exerciser.scala 66:38]
        node _T_237 = tail(_T_236, 1) @[Exerciser.scala 66:38]
        state_number <= _T_237 @[Exerciser.scala 66:22]
        skip @[Exerciser.scala 63:38]
      skip @[Exerciser.scala 53:52]
    node _T_239 = gt(state_number, UInt<6>("h022")) @[Exerciser.scala 45:23]
    when _T_239 : @[Exerciser.scala 45:50]
      node _T_241 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 46:13]
      when _T_241 : @[Exerciser.scala 46:13]
        printf(clock, UInt<1>(1), "All states processed") @[Exerciser.scala 46:13]
        skip @[Exerciser.scala 46:13]
      node _T_243 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 47:11]
      when _T_243 : @[Exerciser.scala 47:11]
        stop(clock, UInt<1>(1), 0) @[Exerciser.scala 47:11]
        skip @[Exerciser.scala 47:11]
      skip @[Exerciser.scala 45:50]
    node _T_245 = gt(state_number, UInt<6>("h022")) @[Exerciser.scala 45:23]
    when _T_245 : @[Exerciser.scala 45:50]
      node _T_247 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 46:13]
      when _T_247 : @[Exerciser.scala 46:13]
        printf(clock, UInt<1>(1), "All states processed") @[Exerciser.scala 46:13]
        skip @[Exerciser.scala 46:13]
      node _T_249 = eq(reset, UInt<1>("h00")) @[Exerciser.scala 47:11]
      when _T_249 : @[Exerciser.scala 47:11]
        stop(clock, UInt<1>(1), 0) @[Exerciser.scala 47:11]
        skip @[Exerciser.scala 47:11]
      skip @[Exerciser.scala 45:50]
    
